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Hi guys,
I would like to know what is the different between analog and digital technology process? Is that if i use analog process, I can't have the digital circuitry or vise versa? What is the significant different in between them and what if in the mixed signal circuit design, which process...
Hi guys,
I have a question here, for an Sr. analog design engineer, it is estimated the yearly salary is about 100k-130k USD (from the job advertisement). My question is out of this salary, how much will be deducted monthly, etc tax , insurance and so on for a foreigner to work in San Diego...
Hi guys,
I'm a Malaysian. I have a more then 5 years of working experience in Analog design field. Currently looking for job actively. If there is any openings in analog field, please pm message me. I'm willing to be relocated outside Malaysia as well, preferable US, UK, Singapore or India...
Hi guys,
I have a question here. I'm designing a differential input amplifier with a integrated CMFB circuit. I'm operating the amplifier in 1GHz frequency. My question is should I consider about the low frequency noise (1/f flicker) noise in my design, I'm asking this because the amp is...
Hi guys,
Please help me to configure how the equation of f=gm/2xpixC in derived from the basic 2 input OTA with Io output seeing a C load. If possible with the small signal analysis. I tried to derive it, but could so as there is no R load. Thanks.
Hi guys,
I would like to know in detail, what are the information actually we can get from the
design.scs and process.scs file while running and simulation in cadence. What actually
the different between the 2 of them.
Thanks,
Anachip
Re: Unity gain amplifier
Could be your opamp is limited by the input common mode range. Try to increase the slew rate of your opamp, that is by increasing the biasing current, which will help in fasten the rise and fall times.
Hi,
I'm expecting a PSRR of a opamp about 60dB. Please guide me, how can I improve the PSRR of the opamp. I know folded cascode will have a high PSRR but i need people to guide me through small signal analysis, meaning that when i tune that particular parameter, i can improve the PSRR and so...
Hi People,
I would like to know why SiGE process is expensive compared to CMOS process? In what way they are different which make the price of fabrication to differentiate between them. Thanks.
Anachip.
Hi Guys,
I would like to know how the PSRR is measured at the output of CMOS Voltage regulator. Please guide me on the method. Where to inject the AC and probe the output. Thanks.
Anachip.
Hi,
I have some question here regarding phase margin calculation in feedback loop. Before this in my circuit design, i always see that my phase start either at 180 or 0 degree, so that at loop gain at unity i always get phase margin from 60 to 100 degree. But for this time, one of my circuit in...
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