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hello
i want to calculate input impedance of rectangular structure with cavity model .
this figure show cavity model formulation ,
but i have problem with creating this code in matlab .
can any one help me ?
hello friends
i have a question ,
how to simulate E near field in ansys HFSS ?
i want to simulate E field in 3cm from pcb edge and plot |Ez| per frequency , like this figure ,
thanks a lot.
How to calculate radiation from pcb edge with magnetic current ?
hello everybody
i have equivalent circuit model of power delivery network of a pcb , can you tell me how to calculate pcb edge radiation with magnetic current ?
i have read many formula like this , but cant solve it .
hello every body
i am intersting to obtain an spice model for power delivery network in pcb , this figure show transmission line method and its equivalent circuit model
can you help me in this method ?
hello every body
i need help for calculate the E_far field with probe in cst because Field monitor will give you the field at a given frecuency but Probe will give you the field in the TIME domain at a specific point you choose.
can you help me how to define probes in cst to calculate |Ez| in 3...
hello friends
can you tell me how to remove the antenna effect from measurment results?
i measured S21 with dipole antenna but this antenna have a little difference between simulation and measurment.
experimental setup for S21 measurment like this figure.
hello every body
why simulation answer in cst is difference with siwave
i want to obtain s parameters for two layer pcb , but answers have a lot of difference
in cst , i use time domain solver with hexahedral mesh .2 port in same location defined.
A long-channel MOS device can be viewed as a series connection of several short intrinsic MOS devices with the drains and sources of adjacent devices connected to each other. If a device of length L μm is broken into N segments, each of the channel segments has length of
L/N μm.
how to spurious...
i found a example code for master of i2c in vhdl but i cant realize clock generation was done ! can you explain this matter for me ? thank you
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
ENTITY i2c_master IS
GENERIC(
input_clk ...
No,I did not express my purpose properly.i think the magnitude of my transfer function is not true in answer of pss/pac analysis .
for transiant analysis :
and pss/pac :
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and dB 20 of voltage gain is :
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