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thanks very much,
the Vds differences are small, I have checked it.
full corner pre-simulation and extracted simulation shows the mismatch is very small.
I check the layout, the master transistor and slave have some distance, will it be main cause for the mismatch?
the current is large, may the...
hello,everyone,
I have met a problem about mismatch of cascode current mirror, the PMOS cascode(3mA) and NMOS cascode (3mA) from the same bias, but test shows that the mismatch is nearly 15%!, PMOS is larger a lot.
Did somebody meet this phenomenon? it makes me mad!
any suggestions or idea...
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