Help about Mismatch of cascode current mirror?

[Allin]

hello,everyone,
I have met a problem about mismatch of cascode current mirror, the PMOS cascode(3mA) and NMOS cascode (3mA) from the same bias, but test shows that the mismatch is nearly 15%!, PMOS is larger a lot.

Did somebody meet this phenomenon? it makes me mad!
any suggestions or idea?

Thanks a lot.

 

[jgk2004]

How are your overdrives for the NMOS and PMOS when comparing? Are they the same?

 

[Allin]

the PMOS is nearly 300mv, while NMOS is nearly 200mV.

How are your overdrives for the NMOS and PMOS when comparing? Are they the same?

 

[jgk2004]

If I was you I would make them the same. You want to make N and P have the same strength so when attached to a high impedance one will not win over the other.... I would say if you connect what you have now up to a high impedance node it will rail high or be offset high....which is bad!

 

[dick_freebird]

The random mismatch may be worse, but you should compare
it to the systematic mismatch that short-channel and operating-
point effects (like a pilot w/ Vds=Vgs vs a slave at Vds=VDD)
would produce.

Beyond that, you'd want to push up sizings to drive down
random mismatch.

 

[skowe26]

Check the sizes (W/L) of your transistors.

 

[Allin]

thanks very much,

the Vds differences are small, I have checked it.
full corner pre-simulation and extracted simulation shows the mismatch is very small.
I check the layout, the master transistor and slave have some distance, will it be main cause for the mismatch?
the current is large, may the mismatch increase with the current?
suppose current mirror is 100uA:101uA, we scale it up 10 times,
will it be 1000u:1010u, I suspect it.

The random mismatch may be worse, but you should compare
it to the systematic mismatch that short-channel and operating-
point effects (like a pilot w/ Vds=Vgs vs a slave at Vds=VDD)
would produce.

Beyond that, you'd want to push up sizings to drive down
random mismatch.