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Hi,
I've reached 32 MByte/s for really large files.
This could go even faster I guess if I was only writing or only reading. At the moment the master of the FIFO reads 64 bytes from the receive buffer, then put 64 bytes in the transmit buffer, and so on (which adds a bit of time compared to...
Hi,
I will try to use the 64kBytes buffers and I'll give you an update of my project for the datarate I achieve to reach.
This could take a few days/weeks, and I'll have to communicate with a bigger fpga (the actual one I have in the Morph-IC-II is quite small), which I'm going to do asap.
Alexis.
Hi,
SOLVED :
I'm not using the "USB Remote WAkeUp" mode, and the master I had taken from the FTDI project of AN_165 was completely ignoring the pin SIWU.
At first sight, it seems quite ok and I didn't question it.
BUT, when unused, the SIWU pin has to receive '1'...
I'd like to THANK YOU...
Hi,
I used channel B to load a binary into my fpga, it used fifo mode (EEPROM set on 245 fifo in channal A and channel B).
After this, channel B is seen as closed.
If I open it, I can see there is nothing in buffers by using FT_GetStatus.
Purging those buffers doesn't change anything too.
***...
Hi,
Thanks for the explanation.
Given that I have the same problem on 2 Morph-IC-II, the problem can't come from a bad solder or a short circuit.
That's why I'm working again on the Software part and I have a few questions:
- At which point does the TXE# signal should go low, at which step of...
Hi,
Not sure about what I did and I don't really understand the meaning of your conclusion about the manipulation with the pull-down resistor.
If it's from VCC it will stay to 3v3 put if it's a normal output pin, it should've been attenuated ?
I have tried on an other Morph-IC-II and I have...
Hi,
* Without putting anything in buffers, TXE# is still high.
*** Am I that unlucky...
* I don't really see how this could come from the fpga programming, and i've done my pin set up with this datasheet for the ft2232h-fpga connection...
Hi,
I just tested it and I do have my 60MHz clock.
I've made a little GUI with LabWindows, here is my FT2232H init code (without any GUI part):
####################
FT_STATUS ftStatus;
DWORD numDevs;
FT_HANDLE curentDeviceHandle;
UCHAR Mask = 0xff;
UCHAR Mode;
UCHAR LatencyTimer = 2;
DWORD...
Hi,
That's what I meant by pulling low "somehow", to make things right/ready for the device to pull it low (itself) when ft2232h is ready to receive data.
Sorry if I was inaccurate in my terms.
I haven't put anything yet in my receiving buffer.
I'm using FT_Prog and i'm doing exactly things...
Hi,
Sure, my bad.
If we see it as an ouput, i have to pull it low somehow right ?
I've followed the datasheet to program my ft2232h EEPROM with FIFO mode etc and I'm sure I'm on channel A to use this 245 sync mode.
My channel A might be wrongly configured but I can't see what I've missed...
Not sure from which side you are seeing this.
For me, TXE# is a ft2232h output, therefore an input for my fpga (to inform about the state of FIFO buffers).
That's why i think I'm somehow supposed to "prepare" things with my GUI/soft part (connected to the ft2232h).
Am I wrong ?
I have nothing...
Hi,
I have a problem with the FT2232H programming trying to use the FIFO Mode.
I have a Morph-IC-II and I'm using D2XX drivers to speak with the FT2232H on board.
I manage to have the 60Mhz clock input (which is my main fpga clock) and I can transfer data from the PC to my FPGA with...
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