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Recent content by agnil155

  1. A

    The difference between ASIC and FPGA

    Re: asic and fpga u will get info at here if u r not satified with this u can search at in this site only with keyword "ASIC AND FPGA" ok
  2. A

    Suggest me a final MTech project in VLSI/VHDL/Verilog

    any one can suggest the topic to me in vlsi ,vhdl or verilog for mtech (elcetronis & communication ) as major project for my good future i know vhdl , little bit verilog. i have duration of 4 months thanks ........
  3. A

    Why currently Verilog is hotter language than VHDL ?

    why currently verilog is hot language than vhdl ? i heard,my friends who are working in front end design they are says that proj are all in verilog only today ? they are in the field of" ip cores "
  4. A

    How to execute a VHDL program with test bench in Qurtus ?

    quest on OPAMP please say to me how to execute vhdl program which has Test bench in QURTUS II V5.1 (evaluation) or ACTIVE HDL 7.1(Evalution) please reply as soon as possibe than Q[/b]
  5. A

    jpeg implimentation using vhdl lang &simulate in fpga

    iam doing project on " jpeg implimentation using vhdl lang &simulate in fpga" please help me how to do ihave a knoledge of some what in vhdl what should i study for this ,and give some sugessions than Q..
  6. A

    Implementing JPEG compression and storage/transmission

    Re: JPEG Compression we can get codes from www.opencores.com
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