Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi guys,
I have a circuit with maximum current of 20mA. I am using a p+ poly resistor to the circuit with estimated layout size 1.5umx12um with sheet resistance 400ohm/sq.
From one of the book it is written that
p+ poly resistor 150ohm/mm2, max current 0.65mA/mm2.
How can I relate the...
Re: Improving glitch from DAC circuit
My circuit is a 12 hybrid of a thermometer DAC and Binary weighted resistor string. 8 bit from the binary weighted resistor string, 4 bit from the thermometer. Here are my binary weighted resistor string circuit and switchable current source circuit. As...
Re: Improving glitch from DAC circuit
Dac specification:
voltage references: 735.127mv
Vdd:1.1v
Sampling frequency:100MHz
Offset error:16.06mv
Current glitch energy:17.4122pVs
For this circuit the glitches is due to the binary weighted resistor string and switchable current source. Is there...
Hi,
How can I improve glitches encountered on following DAC circuit? I have implemented an SRD (Swing Reduced Driver) to the circuit but somehow I need to reduce another 5% of these glitches. Any simple method that can be implemented? I have attached the circuit as well.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.