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SRAM bit cell power measurent in cadence

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Hi! I am simulating the static power(for holding Q =0 in this case) for a read differential 8T SRAM bit cell in cadence virtuoso ADE L. The schematic, input stimuli setup, and node set is as follows. I ran both DC sweep from 0 to 1V and transient analysis. To view the power consumption, I enable the save power signal and plot the pwr from results browser. But I encountered the following issues:

1) The convergence aid -> node set only applies to transient and not DC sweep as shown in the simulation window, both Q and QB are at the save voltage level. How should I set node set to define the data hold in the latch for DC analysis then?
2) In the transient responde, though the node set is correctly set, the pwr signal plot is not the same value as the Vdd*I(Vdd) green plot. As shown in the schematic, Vdd is the only voltage source, I thought the Vdd*Ivdd will then be the total static power consumption? Or the pwr from results browser doesn't represent the total power?

Any help is appreciated, thanks!

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