Writing MODEL for synthesis

[ThaiHoa]

Now I'm working in Model team.... so I need document teach how to write Model using Verilog. Does anyone have any good document about MODEL?

 

[eda_wiz]

What you mean by MODEL team?????
If u r talking about simulation model... there are lotsa docs.. but ur subject says "4 synthesis" ????


rgds

 

[mark_yeh]

the model is not for verification, but for synthesesis instead? i don't understand. but if you write model by using verilog, you don't need much special skills. it's not difficult actually.

 

[ThaiHoa]

Writing Model to create a target (perfect case) for System on Chip team can write RTL Code and use Model as a target for testing function.
Circuit --> Model ---> SoC
\ /
\ /
Layout - --> produce chip

 

[eda_wiz]

OK .. You meant to say about Simulation/behavioral Model....
but your title "Writing MODEL for synthesis" seems to be misleading...

well, if you are wrting the Model in verilog you can find lotsa books in the ebook forum.
I recommend
1) Samir Palnitkar's book on verilog
2) Jayaram bhasker's book

 

[realtek]

I think what you mean is to write a model to test your synthesis circuit
Normal model is behavier description(ex: MCU, RAM,ROM ...)
provide by the vendor to let IC Designer do simulation.
if your job is to write a model,to write a good model, in my opinion,you don't need to use very complex verilog/VHDL syntax, but must let your model can grnerate the same wave as real chip(RAM,ROM...), and the model is only for simulation,cannot be synthesised.

 

[khorram]

You mean to write a behavioral model which is "golden model" in a verification approach. As you described, on one hand you write a high level code to describe the functionality of your system. On the other hand, you write a synthesizable code which is converted to a real hardware. After these phases, you can compare two models to check equivalency or prove that the specification (high level model) satisfies the implementation (RTL synthesizable code).
I recommend you to study the following book:

SYSTEM-ON-A-CHIP VERIFICATION: Methodology and Techniques
Authors: Prakash Rashinkar, Peter Paterson and Leena Singh
Cadence Design Systems, Inc. KLUWER ACADEMIC PUBLISHERS

If you cann't find it in the E-book upload of Electroda, let me know to upload it there.

Regards,
KH