Why we use ERC to check nonrouting layers like diffusions?

[manruru]

in my idea...ERC will check for soft checks....soft checks means routing through a nonroutable layer.example for nourouting layers are diffusions.the question is why are not we supposed to use these layers for routing????

 

[jjx]

erc check bulk tie to net

Consider these two (deliberately sloppy layout) pictures of a classical example. They show schematic and layout of a current mirror where you "accidently" connect the drain of the primary NMOS to the "wrong" side of the gate poly. The poly normally has higher resistance than metal and if you drive a large current through the device, you will have two effects. A varying voltage on the gate, and a vds mismatch on the pair.

Same thing applies to other nonrouting layers.

Sometimes ERC is more of a recommendation and in some cases you can tell the tool to ignore certain net names. And the ERC also looks at other things such as power/ground nets and similar integrity issues.

 

[k_90]

softcheck erc

diffusions are high in resistance and very noisy as they are as close to the substrate.
The only time you could possibily remotely think of using diffusion for connections is to have a high resistance to help protect against edd issues but they are other layers involved like buried layers and I have only used the technique once.

So in my option its a big big no no.

check out Alan Hasting!

 

[sandeep_torgal]

softcheck nwell connections

WHy do u want to use diffusion/other layers for routing. If you are ok with the voltage drop then you can do so. But with the voltage scaling it becomes very difficult to use these layers.

 

[manruru]

Re: its about ERC..

Thank u all....
i dont want to connect using diffusion layers....my doubt is what happens if its get connected thru diffusion...and one more is as far as my knowledge diffusion layers are less resistive not highly resistive.....is it so?????

 

[prashantbabu]

Re: its about ERC..

Compare that to the metal resistivity...You'll notice that diffusion has significantly high resistivity and hence avoided for routings. ex: If you use a diffusion layer to carry a current signal, there will be an IR drop throughout the line, which is negligible in case of metal lines provided you use a metal line of sufficient width.
Hope this helps.

 

[Paramjyothi]

Re: its about ERC..

Hello,

Diffusion is less resistive than Polysilicon and more than metals. Coming to ERC - Softchecks this checker is used only to check for floating substrates or bulks of devices and logical shorts between bulks(when placed in DNwell/Nwell).

Say if you have a N Device, with the device's source & bulk being connected to Vss in the schematic. The Source of the N device is connected to Vss but PTap(bulk) is not been connected and its left floating then during ERC/Softcheck it flags as an error.

Diffusion is substrate and cannot be used for routing purposes, if you use it for routing then that means that you are creating new P/N device regions. Diff is always accompanied by implant layer for P/N device formation only, you cannot use it as standalone layer.

Virtual shorts happen when devices bulk's are placed in DNwell and not connected properly.

Hope this helps you.

Paramjyothi