Why to consider via density in layout

[Amy25]

Hi,

Why we need to satisfy the via max/min density in layouts? Only metal density requirement is not sufficient? What is the effect of vias in fabrication/CMP is considered. or any other reason for via density requirement

 

[moh.haroun]

first of all in pcb fabrication, you are charged additional money per via. Also I need to know is this requirement from the fabricator or from your company.

 

[dick_freebird]

Two primary reasons. One is etch lithography, field loading
of the etchant and whether "lonely" vias pattern the same
as ones in large beds. The other is aligner capability, auto
aligner looks for data features within a limited field of view
and must find something to work with. You don't get to say
where on the pellicle that field of view may land. So you
would properly have not just a chip scale density rollup,
but often within-any-given-area density rules.

Doing things like building in "more than necessary" vias in
standard cells, making "feature-rich" decoupling structures
and so on can improve the baseline density before you add
fills, and perhaps provide some desirable circuit benefit
(pattern fills tend to be useless).

 

[Amy25]

Hi could you please give some more details on fabrication point of view what you mentioned