willvegapunk
Newbie level 3
I've been doing a lot of survey article for fanout for design compiler.
But for some technology process such as 90nm/.18um , our target library (.db / .lib) has already the settings of max_fanout/ max_capcitance for our design, but in 4x nm process, I can't find the max_fanout in .lib file
1. Is that the reason for settings ?? (But how to determine the value for different process technology)
2. Why we still need to set the max_fanout for our design (if our design compiler has already having the default settings) ?
3. For those high-fanout design, those setting seems only make design compiler run longer and hardly to converge, any suggestion for this scenario ??
But for some technology process such as 90nm/.18um , our target library (.db / .lib) has already the settings of max_fanout/ max_capcitance for our design, but in 4x nm process, I can't find the max_fanout in .lib file
1. Is that the reason for settings ?? (But how to determine the value for different process technology)
2. Why we still need to set the max_fanout for our design (if our design compiler has already having the default settings) ?
3. For those high-fanout design, those setting seems only make design compiler run longer and hardly to converge, any suggestion for this scenario ??