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Why PWM is less efficient when the output power diminishes

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xiexi

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I guess the ton is too small and make efficiency lower, but I don't know the reason coz the AC loss doesn't change.
 

PWM has constant switching loss (constant switching frequency with modulated On time or pulse width) and when output power diminishes switching loss makes efficiency lower.

Pulse skipping architectures are more efficient at light loads since pulses are skipped and associated switching power is saved. With light load fewer and fewer pulses are needed (pulses placed far away in time).

Maybe an equation makes it more clear

Efficiency = losses/input power=(Output power+quiescent power+switching power)/input power

When output power drops input power also drops but quiescent power to keep ref etc alive and switching power to turn on and of switches and logic gate losses relating to it stays constant. Numerator has constant values while input/output power drops therefore efficiency degrades with low output power.
 

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