abeybaby
Newbie level 4
cmos comparator design
flash adc is achieved using high speed comparator..
it has 3stages; preamplifier, latch/buffer...
preamplifier is for gain(least required) and freq response(mostly)...
why do we use latches/flipflops in the following stage..
flash adc is achieved using high speed comparator..
it has 3stages; preamplifier, latch/buffer...
preamplifier is for gain(least required) and freq response(mostly)...
why do we use latches/flipflops in the following stage..