owen_li
Full Member level 3
As we know, we should insert lockup latches between cross clock domains to avoid hold violation.
My question is: Should we insert the lockup latch on the shift path or capture path.
The shift path means from Previous register output to next register scan input
The capture path means from Previois register output to next register D input.
My understanding is: these two pathes both have the potential to fail the hold check
because of the clock skew. Should we insert the lockup latches on both paths?
Thank yoU!
My question is: Should we insert the lockup latch on the shift path or capture path.
The shift path means from Previous register output to next register scan input
The capture path means from Previois register output to next register D input.
My understanding is: these two pathes both have the potential to fail the hold check
because of the clock skew. Should we insert the lockup latches on both paths?
Thank yoU!