Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
doesnt tape out check the design correctness.. makin use of random input chjeckin with the output.. i mean check the logical correctnesss of our design.. u have to verify ur datahseet after the tapeout, i mean cross check them. add scanflops or scan cells.. somethin like that in order to correct wrong outputs.. somethin of that sorts.. STA is also very important..if u go thru MAGMA design flow you wud understand the basics.. i guess magma is one tool which has a comprahensive rtl to gds II format..
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.