what is the relationship between phase margin and pole points

[sevid]

i know it can be observed from the amplitude and phase Bode plots of the open-loop gain or loop gain.

but can you tell me the exact equation(s) between phase margin and pole points?

plz help me, thanks in advance.

jeffrey

 

[drknownothing]

Usually instead of equations you use something called "Bode Plot", which is a much more intuitive and direct way of illustrating the relationship between phase margin and pole points, for details you can refer to the following article.

Bode plot - Wikipedia, the free encyclopedia

 

[jimito13]

You can find the required equation in the book "Structured Analog CMOS Design" (Kayal,Stefanovic).Google it and download it from some file hosting service (rapidshare etc...).Unfortunately i don't remember the exact page that contains the equation since i don't have it now in front of me.

Regards,
Jimito13

 

[leo_o2]

I think poles usually make phase margin worse. Specially too many poles within bandwidth is bad .

 

[LvW]

This subject was already discussed in this forum.
See here:

https://www.edaboard.com/threads/91041/