What is duplication register?

[verilog_work_group]

What is duplicated register?

 

[choonlle]

duplicate register means regenerate 2 register or >> to reduce high fan out.

 

[banjo]

The tools have an option to automatically insert duplicate registers to help with timing as Choonlle already said. You can turn this option off if space is really tight in your design, but it may not make timing.
Fanout is only part of the reason, though. Consider a register than only drives two loads. You may find the tools duplicating this register. The reason is the two loads are on opposite sides of the chip. Therefore, there is no perfect place to locate a single driver to have a short route to both loads. Therefore, the tool will try to generate a duplicate register as this allow for an additional degree of freedom in placing parts. It will only do this if there is a timing problem getting the signal to one of the loads. Therefore, you should set your timing constraints to reasonable values only. Setting the timing constraint higher than the part will ever be required to run will only multiply the number of duplicate registers required and can cause the route to be poor.

 

[s3034585]

It is done by the synthesis/place and route tool.. in order to meet the timing constraints.. mainly the idea behind doing it is to reduce the routing length...
and if the fan out is too high then to reduce it...