what does the word 'IPO' stand for?

[iloveelektroda]

It should be a process at final stage of ASIC design, but I don't know it's accurate meaning

 

[casual3_2002]

in-place optimization

 

[linuxluo]

hi,
in detail, that means after synthesis and p&r, if ur designs seems some tiny timing violation. u can use ipo in your synthesis tool and it will do jobs as follows: buffer insertion, cell resize , etc. but dont change your existing logic.

 

[rakko]

I think you do IPO in your layout tool not synthesis?!#!

 

[nineleo]

Severy tools can perform IPO for your design,
e.g., DC and SoC encounter .

 

[alanray]

Use magma , it will do the IPO for you

 

[papertiger]

It's more in P&R now in those days.

 

[seuasic]

I have use it in DC

 

[norton]

"Initial Public Offering" - but this is a joke after all these serious answers

FPGA Guru

 

[aegean.chou]

In-place optimization

You can use IPO to MODIFY/CORRECT function/bug!

 

[maniasonic]

In-place Optimization for correct
or
I-Pray-Oh-god for joke

 

[maharshi_qis]

i think its related to some Intellectual process operations....but am not sure..

 

[jallem]

IPO= Idiots Professional Organization

 

[pratap_v]

hi
IPO stands for in place optimisation. This is actually done after floorplan. And actually done during the placement. IPO is done to increase the chances of meeting ur design timing reqiurements which include buffer insertion and resizing of cells and moving the cell instances.

 

[crazy_man]

It stands for in-place-optimisation.. And it happens during the placement stage.