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What decides Gate length in ASIC 130nm 90nm 65nm etc

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vikramc98406

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What decides Gate length in ASIC to be 130nm 90nm 65nm etc
 

My simple minded perspective is the resolution of the photo etch process.
 

the distance b/w source and drain decides the feature size of device.
if i am wrong correct me plz
 

iwpia50s,

can i take it as wavelength of light thats needed to prepare Masks for photo etch process.

if this is the case, from where these numbers 130nm 90nm 65nm etc comes from
 
130nm 90nm 65nm are gate lengths. As processing capabilities such optical correction improve the gate length and metal width gets smaller.
 

iwpia50s,

i know these are gate lengths,
My question from where these specific numbers come from.
 

They certainly not random numbers.

There should be some reason behind this number.. reason could be technology development..! if fab is able to manufacture given size then ppl go for that technology.
I think its purely based on Fab's ability to make smallest possible dimension
 

I think it depends on following

a) Cost analysis. This is the major factor. Older techonologies are cheaper, but then die size increases, and so does package size/cost as well, and yield and dies per wafer decreases.

b) speed of process

Depending on what speed you want to run at, some techonogies might not be a option at all. You don't not need 65nm if your logic is going to run just at 100Mhz or so, but if you are going to multighz, then 130nm kind of technologies are out of question.

c) power consumption

If you are too much concerned about power, you need to decrease the voltage of operation, hence go for smaller techonologies like 40nm/65nm.

d) voltage requirements - In some cases like power electronics, you have to work with very high voltages, so again small technologies might not be a option at all.
 

rjainv,

u are giving reasons for using 130nm 90nm 65nm.
i am looking for a specific reason why we chose these fixed technologies.

Why not 125um or 80um 0r 70um etc.
Hope u r clear about my question
 

The new technologies are sub-wavelength technologies i.e the light source used has a wave length that is greater than the feature size ...

one of the things that aids to get this is the optical correction techniques..

Also many other parameters enter to determine the feature size, I think one of them is the standards that are widely accepted and used.
 

quaternion,

Do you have any document to get more details on this.

Pls anyone forward me the same
 

I found that on wikipedia :)
""32 nm" refers to the expected average half-pitch of a memory cell at this technology level." @ the 32nm technology page.
"the typical half-pitch for a memory cell would be around 22 nm." @ the 22nm technology page.
"the typical half-pitch for a memory cell would be around 16 nm." @ the 16nm technology page.

It seems to be the technology definition, you know that the memory capacity is the measure of the technology.

What I said in the past post is true but it is not related to the technology naming but it is related to the feature size , and as you notice that the feature size is smaller than the the technology name that assure the definition on wikipedia.
 

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