Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

what are Multicut vias & advantage of it?

Status
Not open for further replies.

fail1

Junior Member level 3
Junior Member level 3
Joined
Sep 19, 2007
Messages
29
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,462
What is the advantage of multicut vias over single cut vias?

Thanks
Kumar
 

Multi-cut vias are a DFM technique to increase the Yield for UDSM processes.

In a IC, a via is used to connect a metal track of one metal layer with a metal track of another metal layer. Generally, for signal lines other than the power lines, one via is provided for each connection point. Such via is called a "single-cut via".

With decreasing technology nodes in IC industry, the metal width gets reduced, and also the cross-sectional area of a via will decrease. Accordingly, in the manufacturing process, it has become difficult to form a via of a desired pattern. In a worst case scenario, an open failure occurs in the single-cut via formation part and thus the desired device operation cannot be implemented, resulting in a lower yield.

Further, as the cross-sectional area of a via decreases, the delay time in signal lines increases, and disconnection rate also increases due to electro-migration. This causes lowering of device reliability.

As a way out of these issues, multiple vias may be provided in parallel for each connection point. Such via is called a "multi-cut via". If two vias are provided for each connection point, such via is called a "double-cut via" . After layout, single-cut vias are replaced with multi-cut vias as many as possible so that the device reliability improves.

Hope it clarifies..
 
Last edited:
Hi pavan,
Thanks alot for the nice explanation. How do we calculate the resistance & capacitance of a VIA? Any idea?

Rgds,
 

Its simpler concept...via is a path for current to flow or a path of resistance...1 via=1 resistor...when you have 2 vias , we have 2 resistors in parallel..so more the no. of vias less is the resistance...but more no. of vias adds to cap value...:-|
 
Hi pavan,
Thanks alot for the nice explanation. How do we calculate the resistance & capacitance of a VIA? Any idea?

Rgds,
Your technology/PDK supplier should provide you with such information. Usually this data is placed in the "Design Rules" papers. You can find couple/fringe capacitance and resistance information for each layer/interlayer. Some fabs also provide with the Kelvin contact res vs current info.
 

hi,
agree with pavan,
Accordingly, in the manufacturing process, it has become difficult to form a via of a desired pattern. In a worst case scenario, an open failure occurs in the single-cut via formation part .

To reduce the manufacture failure chance.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top