Want a discussion on Folded mesh biasing scheme-minimum selector class ab output

[ivyahoney]

Without this minimum current guarantee, one of the prestages - at the limits of the large-signal operation range - could go to zero current and thus would force one of the output transistors also in its "off" mode, hence would change the output stage into a (half-wave) class-B or even class-C mode: Such modes of course have much larger distortion.

Distortion occurs at any frequency, it gets larger, however - given constant input level - with falling open-loop-gain, because the attenuation of the distortion (in first approximation) behaves like open-loop-gain/closed-loop-gain.

That's why distortion at higher frequencies (in the falling open-loop-gain range) always is larger - and so more important if in an considered (used) frequency range.

Thanks, erikl. I sitll got some problems unsolved.

1. I still cann't fully undertand the distortion thing. Does the distortion means for the harmonic distrotion? "The cross-over distortion could be much smaller if we could keep the push and pull current above a certain minimum current Imin". Could you please tell me more details or could you please recommend some materials for me to study?
As open loop gain falls at higher frequency, distortion gets larger. My signal is at low frequency range, 0.1Hz-10Hz. I don't know how to consider this?

2. I have some problems during simulating this class ab amplifier, first of all, I simulate the dc gain using the test-bench circuit shown in Fig1. Then, I want to see the maximum push or pull current of the output transistors. I used the test-bench circuit shown in Fig 2.

The two test-bench are provided a given common output voltage in the output node. Is it right to simulate like this? Or if it is wrong, could you tell me how to simulate the class ab amplifier correctly? I want to see how much the sink/source current capability are.

Thanks a lot!

 

[erikl]

1. I still cann't fully undertand the distortion thing. Does the distortion means for the harmonic distrotion? "The cross-over distortion could be much smaller if we could keep the push and pull current above a certain minimum current Imin". Could you please tell me more details or could you please recommend some materials for me to study?

Harmonic distortion, yes. Just search dedicated forums, Wikipedia or G00GLE.

As open loop gain falls at higher frequency, distortion gets larger. My signal is at low frequency range, 0.1Hz-10Hz. I don't know how to consider this?

Depends on your adjusted closedLoopGain/openLoopGain ratio. Probably in your frequency range you still have the full openLoopGain, so, no, you don't have to consider it.

2. I have some problems during simulating this class ab amplifier, first of all, I simulate the dc gain using the test-bench circuit shown in Fig1.

For a dc sim. you don't need the 1V ac stimulation. Put the Vicm source to the non-inverting input, and the 1F coupling capacitor to GND.
I think your Fig. 1 test bench should be ok. for the openLoopGain ac simulation to show gain & phase vs. frequency.

Then, I want to see the maximum push or pull current of the output transistors. I used the test-bench circuit shown in Fig 2. The two test-bench are provided a given common output voltage in the output node. Is it right to simulate like this? Or if it is wrong, could you tell me how to simulate the class ab amplifier correctly? I want to see how much the sink/source current capability are.

For this you'd use a fixed (application-specific) ac closedLoopGain feedback, and a transient simulation. Decrease the Vac stimulation to an adequate value (say: 1mVac for 1Vac output at a closedLoopGain of 60dB = 1000), use a fixed load resistor to measure both push & pull currents and decouple it by a huge capacitor.