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Violations on clock nets after doing preCTS in Wncounter

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vlsitechnology

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After doing preCTS how do we get the violation on clock nets tht is DRV violations ??
i got max fanout as 80, max cap as 33 and and max tran as 0
but can anyone explain me why do we get this violation on clock net bcz the clock is ideal right???

plz explain clearly if anyone knows the answer or if anyone came such kind of issues then plz let me know

Bye take care
 

PRECTS in encounter

Make sure the clock is set to ideal and not propagated.
"remove_propagated_clock *"
 

PRECTS in encounter

DRV or DRC?
 

PRECTS in encounter

its DRV not DRC...DRC is for opens, shorts and antenna violations got it?
 

PRECTS in encounter

What does DRV stand for? Design Rule Violation? What does it check?
fan out
max current sink
max capacitance
and what else?
 

Re: PRECTS in encounter

Max fanout and Maxcap DRV violations are checked irrespective of your clock propagation.
 

PRECTS in encounter

Why do you care about DRV violations on the clock nets on a prects design?
 

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