dodecahedron
Newbie
Hi! I am using an ECP5 Lattice FPGA with Diamond software and Aldec-HDL as a simulator. All standard free licenses. I have instantiated an EBR (RAM) block and want to see its contents during simulation, to ensure I am writing everything correctly. I remember doing this in Xilinx ISE's simulator (don't remember its name). Is this possible in Aldec-HDL?
I've found the memory viewer tab, but it takes as an input a name of a signal. I can not find a signal that would correspond to the contents on the memory in any of the files, even the generated VHDL EBR file. I can not just drag and drop the EBR instance into the viewer.
Has anyone had a similar experience? Thanks in advance!
I've found the memory viewer tab, but it takes as an input a name of a signal. I can not find a signal that would correspond to the contents on the memory in any of the files, even the generated VHDL EBR file. I can not just drag and drop the EBR instance into the viewer.
Has anyone had a similar experience? Thanks in advance!