Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Via redundency and island

Status
Not open for further replies.

designer_ec

Member level 4
Joined
Mar 31, 2007
Messages
68
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,752
metal fill floating connected to power

In drc what is via redundency and island,pls anybody explain with pictures.What is the difference between via realability and via redundency
 

I would guess that via redundancy is adding extra vias even though they aren't necessarily needed, in case there is a manufacturing defect, that would cause an open if you only had one via.
 

In drc what is via redundency and island,pls anybody explain with pictures.
The question can hopefully be answered from the documentation of the DRC tool, that is using this categories. They are not generally checked in DRC respectively DFM.

Island is referring to unconnected (floating) copper areas to my opinion. They are optionally removed by PCB tools but not usually checked in DRC, unless they are outer-layer-elements and checked against an exported IPC netlist.
 

As stated in a previous post, via redundancy is the requirement to add a second, redundant via wherever possible (sometimes there is not enough room to add a second via). The reason is to improve functional yield by making the design more tolerant of via failures. Also it reduces the current through the via (also good for reliability) and reduces the resistance of the contact.

I don't know where you got the term "island", it is very vague. I am guessing you mean "metal island" or metal fill island". Metal fill is the set of floating "islands" of metal that are inserted wherever there is open space without any (or enough) routing wires. The reason is to improve manufacturability. If you do not add metal fill in these areas then the the chemical-mechanical polishing (CMP) step during manufacturing will abrade away the oxide more quickly in these places than in places where there is a lot of metal. This is called "dishing" and leads to degraded planarity of the layers.
In older processes the metal fill was implemented as wires connected to power or ground. This is not done anymore and floating "islands" of metal are used instead.
 

Island is something minimum area violation.
For example,
piece of M2 should have .50u2 minimum area. If there is a metal piece in your design which have area less than .50u2 then there will be an island violation.

And I hope you are clear with the via_redundancy from above explanation.

Via reliability is something like, if you have only one via connecting tow metal layers, but it requires at least two via.
And some times via reliability is coming due to overlapping of some vias.

- Hardik Desai
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top