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VHDL vs Verilog which more popular?

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different continent different prefer
 

ddt694 said:
all stupid tools!

i think @ltera's AHDL is the right one.

but, of course, it is not the industry
standard.

I`m absolutely agree with you.

Hardware Eng. in most cases use AHDL or VHDL
People who develop both Soft and Hard use Verilog
IMHO
 

verilog is similar to C, so it is easy to learn.....
 

Study both. I know that English is more popular than French, but I studied French first , so I learn English. I studied VHDL in school but where I work, Verilog is prefered, so I studied Verilog
 

I think VerilogHDL is better.
It is easy to learn and use. If one uses VerilogHDL, he is easy to use SystemVerilog in the future.
 

Black Jack said:
ddt694 said:
all stupid tools!

i think @ltera's AHDL is the right one.

but, of course, it is not the industry
standard.

I`m absolutely agree with you.
IMHO

I'm puzzled. In my school our professor told us never to learn AHDL
which just wasting time.

Can you point me some details?
 

From my experience, Verilog is used more widely in industry, while VHDL is used more widely in schools and small companies.
 

Verilog is very popular in china, it is very easier in hand
 

i think SystemVerilog and SystemC whill be the future.
 

The US west coast and Asia prefer Verilog while US east coast and Europe mostly use VHDL. Verilog, with its latest IEEE1364-2001 standard seems to be widely accepted in future as compared to its counterpart VHDL.
 

There seemed to be more enhancement in Verilog especially with the version 2001 released. No news on VHDL though.

Anyway, it seemed that SystemC would be phased out soon and System Verilog is coming in. That's what I heard.
 

I still use VHDL, but a lot of people prefer Verilog now.
 

We use both languages in our company.
Generally, European customers ask we for VHDL
and Asian customers require for verilog HDL.
 

Verilog is more popular than VHDL.
 

I agree edacw´s statement.
The most japanese and american companies use verilog.
 

I think compare Verilog and VHDL is just like comparing C and Ada, the former is ease to learn, and the latter is more difficult to learn, but they can do the same thing. In industrial, the Verilog is pop than VHDL. I know Verilog and VHDL, but I like Verilog.
 

verilog is more easily for us !
 

Our digital designers use verilog,but I don't know why they use it. :p
 

BOTH are easy TO LEARN !!!.. but HARD to MASTER!
 

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