Verilog A Based Differential Input, Differential Output Sample and Hold Circuit

[Puppet123]

I am looking for an ideal Verilog-A Based Differential Input, Differential Output Sample and Hold Circuit for use in a Flash ADC simulation.

Do you know where I can get one ? Is this included in the analog lib or ahdl lib libraries in the Cadence Virtuoso Platform / Spectre simulator ?

Thanks.

 

[AMS012]

You can use a sample and hold (sah) block in cadence.