Variable length input

[cristiano7]

My problem is how to give as an input a variable length std_logic_vector.To be more specific i want to have a VHDL implementation that will take as an input an std_logic_vector(0 to variable) .How can i do that?

 

[mrflibble]

You could google "parameterized module vhdl" . I know how to do it in verilog, but that's not much help to you. Anyway, what you probably want is use a parameter to control the width of that register. Hence the search string suggestion. Good luck! Or if you're patient, just wait for someone who knows vhdl to answer it.

 

[TrickyDicky]

You cannot pass in a variable length Std_logic_vector that changes over time. It has to be fixed at compile time. You will have to build a circuit that only selects a specific number of bits during run time.

And you cannot have a variable number of output bits either. it is fixed at compile time.

 

[mrflibble]

Good catch, he does mention wanting to actually use it as an argument. I already made the rather large assumption that the OP obviously did not really mean that since that kind of code would not be synthesizable to real hardware. But indeed, the only way you can do variable width is at time of synthesis. The logic in your fpga will always be a specific fixed width (the width you specified during synthesis).

 

[FvM]

I hoped, you would give a clearer specification this time - and consider basic VHDL rules.

As your previous thread https://www.edaboard.com/threads/222442/ clarifies, you're heading for a runtime variable input vector. Technically, this can be only achieved by specifying a maximum length for the data element, defining a respective input signal and pass 0 or 1 to MAX_LEN at run time. If you think about it, you hopefully understand, that there is no other solution for synthesizable code.

 

[cristiano7]

is it possible to read from a file or somewhere else the message and save it as an input?I came across to a textio package while googling but i am not sure what is this for!

 

[TrickyDicky]

textio is just for simulation, not actual hardware.