[SOLVED] Using CPLD on FPGA Board

[linam]

hi,

is it necessary using CPLD to connect pins of an IC for example RS485 IC to FPGA pins on a FPGA board? why do we connect CPLD pins with FPGA I/O pins?

 

[KlausST]

Hi,

another general question: Why do we fly from Europe to America? Is it necessary?

--> Without additional information hard to answer.

We don´t know what you are talking about. What board? What FPGA? What CPLD? What signals? What voltage levels? What data speed? ....

Klaus

 

[linam]

Hi Dear KlausSt,


my question is about reason of using CPLD, I'm wondering why is CPLD used? why is cpld used such as a bridge between FPGA and other IC?

I know my question is general and thank you for your response. I'm confused about using CPLD on FPGA board. I don't know why do pins of a chip like wiznet W5300(Ethernet controller) need a CPLD to connect I/O pins of vertix6lx130t? I saw in schematic of my board that wiznet pins connect to a CPLD and then CPLD pins connect to FPGA. what's the matter with directly connection of FPGA pins and wiznet pins? why is CPLD used?

 

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Two words: level shifting

Had a suspicion so checked the datasheet and V6 I/O are capable of 1.8V and 2.5V. The W5300 is a 3.3V device that has 5V tolerant I/O.

 

[FvM]

Level shifting can be performed by simple hardwired logic components. Programmable logic would be used if additional logic functions are required. In so far the answer to your question "is it necessary using CPLD to connect pins ..." is no.

Possibly a CPLD supporting multiple IO voltages is already in use for other purposes and has unused pins.

 

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As FvM suggested I worked on an FPGA design that also used a CPLD to interface with a number of other devices and the CPLD was there for both level translation and multiplexing multiple i2c, SPI, and JTAG devices with the FPGA.