USB VBUS confusion

[Rajinder1268]

Hi,
I have attached a part of the datasheet for a FTDi device.
The evaluation schematic board has a filter and 10nF connected between VBUS1 and 0V. I can't see the point of the filter as VBUS1 is connected directly to the FTDI chip (pin 12)?

The FTDI hardware recommendations state there is a different filter configuration. This makes more sense as the VBUS is filtered to obtain a clean 5V0 supply that would then power the FTDi chip.

Do I need to include the first schematic (ferrite + 10nF) and then from the ferrite/10nF junction add the second schematic for additional filtering i.e. 10nF + ferrite (BK0) + 100nF + 4.7uF?

Which one do I use or is it a combination of both?

Thanks in advance.

 

[stenzer]

I have attached a part of the datasheet for a FTDi device.

... obviously you forgot to include the datasheet . Please provide the corresponding sketch.

BR

 

[Rajinder1268]

... obviously you forgot to include the datasheet . Please provide the corresponding sketch.

BR

--- Updated May 12, 2021 ---

Oops, I thought I added the relevant data sheets. I will do so now.

--- Updated May 12, 2021 ---

Here are the datasheets.

--- Updated May 12, 2021 ---

Sorry it's the hardware guidelines and the lc231x (page 8) schematic. The link for the hardware guidelines is https://www.ftdichip.com/Support/Do...B_Hardware_Design_Guidelines_for_FTDI_ICs.pdf

It has a schematic with addition filtering.

--- Updated May 12, 2021 ---

Hi all,
Here are the relevant pages:
I can't see the point of the left hand side as VBUS1 is connected to the FTDi chip, should this not be filtered?
The second schematic makes more sense as 5V0 is filtered.
Which one do I use, or is it both?

 

[stenzer]

Hi,

the confusion is almost perfect .

The evaluation schematic board has a filter and 10nF connected between VBUS1 and 0V.

I assume you are reffering to VBUS which is pin 1 in figure 2.5 (page 8) in [1]. This is a common practice which you will see as a recommendation in almost every datasheet. The capacitor has a twofold purpos, which are:

(i) Acts as LPF in combination with your prasitic trace inductance and trace resistance and here of course also with your ferrite bead. For this circuitry including the ferrite bead (FB), where the FB has a high impedance at high frequencies and the capacitor represents a low impedance at high frequencies, this combination effectively attenuates high frequency disturbances.
(ii) The capacitor acts as buffer/energy-reservoir which provides energy/current almost instantaneous when the IC demands it e.g. sourcing a high output current (fast output switching). For such fast current demands the parasitic trace impedance of your trace AND usb cable represents a high impedance. Consequently, the delivered current from e.g. a wall-plug usb charger is "delayed".

100nF + 4.7uF?

This two capacitors also contributes to a low pass filter, with the impedance (L + R) of your USB cable. The 4.7 µF is an electrolytic capacitor which typically has a lower self-resonsnt frequency (fs1), whereas the 100 nF capacitor is a ceramic one with a higher self-resonant (fs2) frequency. The electrolytic capacitor provides a good filter performance for lower frequencies, and the higher frequencies will be attenuated with the ceramic one (fs1 < fs2).

Note, a capacitor provides (as intended) a capacitive behaviour when operated up to ist self-resonant frequency, by means of its impedance. Starting from low frequencies to higher frequencies the impedance decreases. At frequencies above the self-resonant frequency the capacitor acts like an inductor, where its impedance increases with increasing frequency.

And also this two capacitors act as a buffer, as the USB cable might be long and thus resulting in a high inductance.

Further, the FB and the capacitors on both sides are creating a \[\prod]-filter, which also attenuates noise/ripple which is leaving the VBUS output. This helps to avoid the distribution of noise created within a certain IC across the supply line (VDD i.e. VBUS) and the disturbance of other ICs on the same supply line.

BR

[1] https://www.ftdichip.com/Support/Do...B_Hardware_Design_Guidelines_for_FTDI_ICs.pdf

 

[Rajinder1268]

Hi,

the confusion is almost perfect .


I assume you are reffering to VBUS which is pin 1 in figure 2.5 (page 8) in [1]. This is a common practice which you will see as a recommendation in almost every datasheet. The capacitor has a twofold purpos, which are:

(i) Acts as LPF in combination with your prasitic trace inductance and trace resistance and here of course also with your ferrite bead. For this circuitry including the ferrite bead (FB), where the FB has a high impedance at high frequencies and the capacitor represents a low impedance at high frequencies, this combination effectively attenuates high frequency disturbances.
(ii) The capacitor acts as buffer/energy-reservoir which provides energy/current almost instantaneous when the IC demands it e.g. sourcing a high output current (fast output switching). For such fast current demands the parasitic trace impedance of your trace AND usb cable represents a high impedance. Consequently, the delivered current from e.g. a wall-plug usb charger is "delayed".


This two capacitors also contributes to a low pass filter, with the impedance (L + R) of your USB cable. The 4.7 µF is an electrolytic capacitor which typically has a lower self-resonsnt frequency (fs1), whereas the 100 nF capacitor is a ceramic one with a higher self-resonant (fs2) frequency. The electrolytic capacitor provides a good filter performance for lower frequencies, and the higher frequencies will be attenuated with the ceramic one (fs1 < fs2).

Note, a capacitor provides (as intended) a capacitive behaviour when operated up to ist self-resonant frequency, by means of its impedance. Starting from low frequencies to higher frequencies the impedance decreases. At frequencies above the self-resonant frequency the capacitor acts like an inductor, where its impedance increases with increasing frequency.

And also this two capacitors act as a buffer, as the USB cable might be long and thus resulting in a high inductance.

Further, the FB and the capacitors on both sides are creating a \[\prod]-filter, which also attenuates noise/ripple which is leaving the VBUS output. This helps to avoid the distribution of noise created within a certain IC across the supply line (VDD i.e. VBUS) and the disturbance of other ICs on the same supply line.

BR

[1] https://www.ftdichip.com/Support/Do...B_Hardware_Design_Guidelines_for_FTDI_ICs.pdf

Hi thanks for the info. Do I need to include both on my schematic?

 

[stenzer]

It also depends on the kind of circuitry which might also be supplied by VBUS e.g. an analoge signal conditioning circuitry.

Have a look at https://andybrown.me.uk/2015/07/24/usb-filtering/

 

[Rajinder1268]

It also depends on the kind of circuitry which might also be supplied by VBUS e.g. an analoge signal conditioning circuitry.

Have a look at https://andybrown.me.uk/2015/07/24/usb-filtering/

The VBUS will power a TVs clamp circuit and the FTDi chip.
I think it should be like this: VBUS is clearly filtered to 5V which will power the FTDi chip.

 

[FvM]

I don't understand your doubts alltogether. All FTDI schematics are showing a similar filter topology: 10 nF capacitor at the USB connector, ferrite bead, 100nF||4.7uF at the chip supply pin (node VBUS1). Your latest attachement uses the same topology, apart from dropping the 10 nF capacitor, which should be there.

If you are showing the DRC errors for a reason, please clarify what the involved components are.