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two questions as outswing and load capacitor!

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samuel

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(1) what is the operational amplifer outswing as showing? the nonliear show what?
DR.png
(2) the load capacitor of this circuit? how to design this amplier SlewRate?
Screenshot.png
 
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    samuel

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hello, erilk

(1) when any transitor falling out of saturation, charge transfer is affected as the circuit above? That is to say, this circuit minimum outswing is about 2V, not about 1.6V? In fact, this circuit minimum outswing is about 1.6V.
(2) how to calculate the circuit load capacitor?3.1pF//3.1pF as the above circuit? or can you show some paper about this?

thank you again!
 

(1) when any transitor falling out of saturation, charge transfer is affected as the circuit above? That is to say, this circuit minimum outswing is about 2V, not about 1.6V? In fact, this circuit minimum outswing is about 1.6V.
Actually, the usable output swing is down to 1.6V, the range between 2V and 1.6V just with a lower slew rate.


(2) how to calculate the circuit load capacitor?3.1pF//3.1pF as the above circuit? or can you show some paper about this?
These feedback - resp. switched capacitor (SC) - cap. values should be sufficiently larger than their involved parasitic caps, these depending on process and layout. For 180nm processes I've successfully used cap values < 1pF.

You can find related info in any Analog Design text book; search for SC circuits.
 

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