jjean
Newbie level 5
Hi,
I have a question regarding scan insertion.
How is timing for scan paths taken care of?While doing synthesis, we constrain the inputs/outputs of the design for certain input/output delays.How are scan inputs and scan outputs constrained?
Appreciate any help.
I have a question regarding scan insertion.
How is timing for scan paths taken care of?While doing synthesis, we constrain the inputs/outputs of the design for certain input/output delays.How are scan inputs and scan outputs constrained?
Appreciate any help.