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[SOLVED] The stability of opa is error for a opa model of ahdlLib

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mpig09

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Hi :

I use a opa symbol that from the ahdlLib to simulate the stability,
but the result is wrong.

The dc simulation is correct, please reference the attached file : dc_result

but when I want to simulate the stability, the simulation result is wrong,
please reference the attached file : stb_result

The opa parameter setting is opa_parameters.

Is the setting not correct?
I hope someone can help me.

Thanks for your help.
mpig
 

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  • opa_parameters.png
    opa_parameters.png
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  • stb_result.png
    stb_result.png
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  • dc_result.png
    dc_result.png
    17.3 KB · Views: 136

I never liked the stb tool, maybe you should try an
old school analysis (ac, use vcvs to pick off input
difference voltage, use Calculator to plot AV and
phase). That way you will see whether it's the op
amp or the analysis that's messed up.
 

Hi dick_freebird:

I never liked the stb tool, maybe you should try an
old school analysis (ac, use vcvs to pick off input
difference voltage, use Calculator to plot AV and
phase). That way you will see whether it's the op
amp or the analysis that's messed up.

==>does it mean the this symbol "may not" do stb simulation?

mpig
 

To me, the most reliable stab. analysis is simply to plot the small-signal loop gain (magnitude and phase) vs. frequency and check the stability margin (based on the stability criterion).
 

You have a typo in ground net name so your circuit does not have a ground. Replace gdn! with gnd! and re-check.
 

Hi Dominik Przyborowski:

You have a typo in ground net name so your circuit does not have a ground. Replace gdn! with gnd! and re-check.

==>I modify the ground net to gnd!, the result is the same.

For these discuss, maybe this symbol really can't do the stability analysis?!!

mpig
 

Might suggest putting trivial resistors (like 10mOhm)
in series with symbol terminals, between it and the
"outside world". I have found some behaviorals do not
act right regarding terminal currents, but the analogLib
resistor does not lie.

But give a classical, ac simulation a try, and plot gain
& phase in the usual way. Then you will be able to say

- the cell works and stb does not

or

- the cell does not work (as parameterized) and stb is
telling you so

Since the DC offset is roughly what you told it, I'd be
inclined to think the cell is "good" (for DC at least).
 

Hi dick_freebird:

Might suggest putting trivial resistors (like 10mOhm)
in series with symbol terminals, between it and the
"outside world". I have found some behaviorals do not
act right regarding terminal currents, but the analogLib
resistor does not lie.

==>Good news for me to observe further, I will try this method.

But give a classical, ac simulation a try, and plot gain
& phase in the usual way. Then you will be able to say

- the cell works and stb does not

or

- the cell does not work (as parameterized) and stb is
telling you so

Since the DC offset is roughly what you told it, I'd be
inclined to think the cell is "good" (for DC at least).

==>Yes, I agree the cell is good.
I also wish to check the parameter of Gain / GBW product of the symbol,
so I do the stb simulation.

mpig
 

Hi all:

I try to do your suggestion, but they are not work.
So I change the cadence environment form IC616 to IC5141,
the simulation is work (PM = 14, Gain = 60dB)

I think the problem is my cadence environment issue.
So I closed this topic.

Thanks for your help and give me the suggestions.

mpig
 

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