The cause of spikes in a boost converter

[Mercury]

Hi guys!
I've made a boost converter working on 500kHz with Vin=10V, Vout=20V. I'm having problems with voltage spikes in the switching node. I've replicated the circuit in Pspice which gives me exactly the same results (more or less) as in real life:

And the voltage in the switching node is:

The snubber solves the problem with positive spikes, but it does nothing for the negative spikes (which are allot bigger). The cause of the negative spikes is the parasitic inductance from the node to the MOSFET. Besides keeping traces as short as possible, is there anything I can do?

One thing I've noticed. The negative spikes are somehow dependant on the diode used. This MUR410 gives spikes of about -50V, but 15ETX06 causes almost no spikes (tested in PSpice only). So, can anyone explain what is going on?

Thanks and best regards!
George

 

[frankliner]

You need a diode with a fast reverse recovery time. Otherwise you will get a large current spike when turning on M6.

You might also want to slow the turn on of m6.

 

[dick_freebird]

I find it not-credible that the FET body diode would let the
drain swing that far negative. Not that you want the body
diode to be the backstop anyway; an antiparallel Schottky
might be your answer.

Seeing that the spike comes at the turnon edge, I would
conjecture that the problem is the L14 sucking current out
of the FET while its on-resistance is not fully driven down.
You might gain some insight by looking at the branch currents.
It may be that your snubber wants retuned to take current
to zero before next cycle (discontinuous conduction mode).
If you must operate in continuous conduction, I guess you
will want that Schottky, and perhaps to minimize FET turnon
risetime (turnoff, there is liable to be a sweet spot between
lossiness and EMI).

 

[frankliner]

The drain will not go negative. I imagine the negative spike at the diode is even much worse.

The problem is reverse recovery. Use an appropriate rectifier diode and your problem will go away.

 

[--jason--]

most probably is cause by the L15, try to change the FET with short recovery time.

 

[Mercury]

Thank guys! So, tomorow I will try to use a faster diode and a faster FET. However, the MUR410 is already really fast; it has Trr=25ns. I'll try to get something faster, but it's going to be difficult.

Thanks again!

 

[BADFLOPPY]

Just have a try with
1. interchanging L13 & L15 value..
2. Shorted L15.

 

[FvM]

I will try to use a faster diode and a faster FET.

Only the diode is too slow respectively generating huge reverse recovery currents of about 40A. Simply change to a schottky
diode. The FET is at present already slowed down by it's gate resistor, most likely a reasonable dimensioning.

@BADFLOPPY: You apparently don't understand the meaning of the 2 nH inductors L14 and L15. They are representing parasitic
circuit inductances, that can't be removed at will, because they are present anyway.

 

[Mercury]

Well I'll be dammed. It works!!!
It's all about the diode then; I've tried with 30QB100 Schottky diode and the spikes are practically gone (only about 1V in spice). And you were right, it's the reverse current of the diode causing the spikes.

Thanks again!

 

[Mercury]

There's one more thing I would like to ask. In the LT3755 datasheet it says, to minimize the area of the switching node. Now, that's a problem, since baically all MOSFETs have the drain terminal connected to the casing. So what can be done regarding this problem?

George

 

[FvM]

...minimize the area of the switching node. Now, that's a problem, since baically all MOSFETs have the drain terminal connected to the casing.

It's the pin distance, that spans the area. The drain-source pin distance of a SO-8 package must be accepted. Furthermore, Si7850
has an exposed drain pad, so the distance is even lower. Most of the parasitic inductance amount can be expected in your PCB wiring.

 

[Mercury]

Got it thanks! The way I unserstood it was, that the area of the switching node must be small, meaning I am not allowed to use a pcb plane for cooling the mosfet. Thanks for clearing that out for me!!!

George

 

[FvM]

Using wide traces, copper pours or even planes to conduct the switched currents can be part of the solution to reduce the spanned
area respectively the parasitic inductance created by it.

 

[Mercury]

Well I can confirm, using a 30BQ100 solves the problem of negative spikes. There were about 3V positive spikes, but a 1nF 2.2 Ohm snubber took care of that. Now I have almost perfect square waveform. Big Thanks!!!

One more thing. The inductance of a via is mostly dependant on the thickness of the PCB. So should I use a 0.8mm FR4 instead of the 1.5mm? I know I get lower mechanical strenght of the board, but if that's not a problem, is there any other downside of using a thinner PCB ?

George

 

[karesz]

Hi,
I think, at these frequencies is Via-impedance not so relevant, more interesting is the mechanical stability of your PCB, but if you afraid some effects of Via; use bigger ones in hole diameter, or take more time parallel of them...
K.