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ternary content addressable memory vs SRAM memory

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mahalakshmi r

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Ternary content addressable memory compared with static random access memory (SRAMs), TCAMs have certain limitations such as low storage density, relatively slow access time..
i have many doubts in its..
1) what is the maximum capacity of tcam and sram?
2) tcam memory perform lookup operation at one clock cycle then how one can say that slow access time?
3) how many clock cycle required for SRAM memory to perform operatio?
4) if tcam memory functionality implemented in SRAM memory, how is it effective than individual tcam memory ?

if any one know it please reply me....
 

1. I have seen sram of several MB, but I have never seen a tcam. I assume the tcam is more how the controller works, as it would probably be an sram under the controller.
2. The slow access time comes because it can only search one localtion per clock cycle, and then it will take many clock cycles to match the data. Hence the massive latencies with a Tcam. Basically the larger the storage, the higher the latency.
3. Usually 1 or 2.
4. Slow

I have never seen a tcam used for anything except the smallest memories, because they are so slow.
 
Except for a slow sequential emulation, content addressable memory can't be implemented in conventional SRAM.
 
2. The slow access time comes because it can only search one localtion per clock cycle, and then it will take many clock cycles to match the data. Hence the massive latencies with a Tcam. Basically the larger the storage, the higher the latency.


but i heard that tcam memory perform parallel operation.. it compares the input data with all stored data at single clock cycle i.e, simultaneous operation performed in tcam.. if you have any information against it please tell me...

Except for a slow sequential emulation, content addressable memory can't be implemented in conventional SRAM.

tcam memory can implement in sram memory. how it is possible means the stored content of tcam memory stored as address in sram memory. therefore, comparison operation performed by input of content act as address in sram memory.. but i wand information of it is effective or not...
 
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i have planed to do ME project based on "SRAM based architecture for TCAM". The concept of the paper is implementing TCAM functionality in SRAM memory. it achieved by the content of tcam is mapped in to corresponding sram memory then sram act like tcam we can gat the advantage of sram and also functionality of tcam...
do you have any idea about this.....
 

The only way I know of using a standard SRAM memory is use a multiport SRAM memory and read them in parallel as much as possible to improve the performance of the search. This is why the normal CAM type memories are slow due to the parallel read/compare operation that has to occur to find the data in the memory array. A brute force approach would be to not use a memory and store all the data in a large register array so you can read all the values in parallel, otherwise you have to replicate memories enough times to meet whatever performance criteria you are trying to reach.

Regards
 

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