pgbackup
Newbie level 6
top pad master
I'm trying to do design planning on a simple design using IC Compiler. However, I'm getting errors that I have no power/ground pads at the top level. These need to be supplied using a file. I'm using the synopsys reference methodology scripts and it has the following comments:
# To run it on a block without existing PG pins, you can use following commands before analyze_fp_rail
# create_fp_virtual_pad -load_file pna_output/strap_end.VDD.vpad (VDD is your power net name)
# create_fp_virtual_pad -load_file pna_output/strap_end.VSS.vpad (VSS is your ground net name
# then add the following option to analyze_fp_rail
# -use_pins_as_pads
# To run it on top level with existing power pads, you can use one of the following options
# -pad_masters $PNS_PAD_MASTERS (specify pad cell masters) or
# -read_pad_master_file $PNS_PAD_MASTER_FILE (specify a file with pad cell masters) or
# -read_pad_instance_file $PNS_PAD_INSTANCE_FILE (specify a file with pad cell instances)
# To run it on top level without existing power pads, you cna use following commands before analyze_fp_rail
# create_fp_virtual_pad -load_file pna_output/strap_end.VDD.vpad (VDD is your power net name)
# create_fp_virtual_pad -load_file pna_output/strap_end.VSS.vpad (VSS is your ground net name
# To simulate standard cell rail during PNA, you can use the following option
# -create_virtual_rails $PNS_VIRTUAL_RAIL_LAYER
# To use more accurate power consumption of each instance calculated in ICC, you can use the following option
# -analyze_power
Can someone tell me what the syntax of the PNS_PAD_MASTER_FILE or INSTANCE_FILE looks like? Any examples?
Atlternately, what is strap_end.VDD.vpad? What commands do I put inside this file? I'm searching the docs but I'm not getting anywhere. Thanks for any ideas.
I'm trying to do design planning on a simple design using IC Compiler. However, I'm getting errors that I have no power/ground pads at the top level. These need to be supplied using a file. I'm using the synopsys reference methodology scripts and it has the following comments:
# To run it on a block without existing PG pins, you can use following commands before analyze_fp_rail
# create_fp_virtual_pad -load_file pna_output/strap_end.VDD.vpad (VDD is your power net name)
# create_fp_virtual_pad -load_file pna_output/strap_end.VSS.vpad (VSS is your ground net name
# then add the following option to analyze_fp_rail
# -use_pins_as_pads
# To run it on top level with existing power pads, you can use one of the following options
# -pad_masters $PNS_PAD_MASTERS (specify pad cell masters) or
# -read_pad_master_file $PNS_PAD_MASTER_FILE (specify a file with pad cell masters) or
# -read_pad_instance_file $PNS_PAD_INSTANCE_FILE (specify a file with pad cell instances)
# To run it on top level without existing power pads, you cna use following commands before analyze_fp_rail
# create_fp_virtual_pad -load_file pna_output/strap_end.VDD.vpad (VDD is your power net name)
# create_fp_virtual_pad -load_file pna_output/strap_end.VSS.vpad (VSS is your ground net name
# To simulate standard cell rail during PNA, you can use the following option
# -create_virtual_rails $PNS_VIRTUAL_RAIL_LAYER
# To use more accurate power consumption of each instance calculated in ICC, you can use the following option
# -analyze_power
Can someone tell me what the syntax of the PNS_PAD_MASTER_FILE or INSTANCE_FILE looks like? Any examples?
Atlternately, what is strap_end.VDD.vpad? What commands do I put inside this file? I'm searching the docs but I'm not getting anywhere. Thanks for any ideas.