nkef
Newbie level 6
Graphical VHDL Editor
I am looking for a Graphical VHDL Editor. I have build varius VHDL modules and i want to create multiple instances of them and connect them in pure-structural manner at top-level. I wish to avoid instantiating them by hand because it is confusing and error prone . I have tried to instantiate them using the generate vhdl feature, but the structures are not regular , so there no use for it.
If you hava any suggestion please post it, free tools would be preferable.
Many thanks
I am looking for a Graphical VHDL Editor. I have build varius VHDL modules and i want to create multiple instances of them and connect them in pure-structural manner at top-level. I wish to avoid instantiating them by hand because it is confusing and error prone . I have tried to instantiate them using the generate vhdl feature, but the structures are not regular , so there no use for it.
If you hava any suggestion please post it, free tools would be preferable.
Many thanks