Substractor Current Design

[gidlio]

hi
I want to simulate a current substractor using cmos current mirror.
my circuit show in post below.
in this circuit first copy Iin1 , Iin2 using current mirror
and finally : Iout=Iin2-Iin1
How I can see Iout Value in simulating software?
I should use a current probe on head of Iout but Where another
head of probe should connect?
if I connect another head of probe to ground Iin1(its copy) will be zero
and
if I connect another head of probe to Vdd Iin2(its copy) will be zero.
how I can see Iout?
my simulating software is : ADS Agillent technology.

thank you very much.

 

[FvM]

I presume you're able to measure currents in your simulation.

You'll however need to define a load for the current output, e.g. a voltage source at mid supply or a voltage divider.

 

[gidlio]

thank you for your help.
cmos that belong to current mirror must have same supply.
with your answer current mirror doesnt work.
any body help plz?

 

[FvM]

You're talking in riddles somehow.

How did you connect the current output?

It should be clear that voltage level enforced by the load must allow saturated operation of both output transistor. Vdd/2 would be an obvious choice.

 

[gidlio]

thanks
I want to use substractor circuit in another circuit that has many current mirror.
other current mirror use for add the current.
I should have a same supply for all current mirrors.
What I should do now?