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SRAM read current

parminder

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Hi, i want to know that in cadence how read current of single bit cell (6T SRAM ) is measured ? i am doing DC simuation for this but how to make Q / Qbr = 0. can anyone please help
 
The read charge is probably more about the row and column
lines' displacement charge (capacitance and rail span) than
any bit cell. The bit cell only has the job to cause the read
transition by delivering the current that moves read line from
precharge to proper-rail output level. But the word (address)
line, if not the uninteresting repetitive read scenario, also has
activity which would roll up to a part-level read bit energy and
with read word rate, current.
 

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