SPI flash controller in HDL

[rockybc]

Hey guys , I am woking with SPI flash controller in FPGA these days, and does anybody could give some help? I found the spi flash controller on opencores.org ,but that's not a typical spi flash controller,just 12 instructions, so if you have relative data or hdl code ,plz ,help

 

[FvM]

but that's not a typical spi flash controller,just 12 instructions

do you need more? What are you exactly missing?

 

[rockybc]

Like block erase, dual port mode w/r and quad port mode w/r.

 

[FvM]

What do you mean with block erase in constrast to sector erase provided by the flash memory? Do you think of implementing a flash translation layer or a complete file system? That could be done on top of the physical SPI flash layer. The same with "ports".

 

[rockybc]

The spi flash controller on Opencores.org supports ST M25P80 flash. At the point of M25P80 flash,it has the function of sector erase, bulk erase(chip erase), standard SPI mode of Read/Write, not including block erase, dual port mode/Quad port mode of Read/Write.