core2010
Newbie level 3
Hi,
I have a spi core(set as master) installed which has a C interface which controls a Mcp2515(spi) as a slave.
Trying to reduce overheads on the system C code, we require an additional Verilog module that will detect
when the Mcp2515 interupt pin goes low, and through the same SPI core which cause an additional spi
read interupt register(CANINTF) command to be carried out of the mcp2515.
To confirm the IRQ came from the receive buffer.
Then request RXB0 from the Can buffer.
Send spi instruction to the MCP2515 can chip to send its buffer contents.
Signal a IRQ to the Main C SOFTWARE, reset the Can chips IRQ line, ready for further messages.
Given the information above for the additional Verilog module,
IAM NOT SURE HOW TO CODE IN VERILOG THE ADDITIONAL INTERFACE BETWEEN THE SPI CORE AND THE MCP2515 CAN CHIP
Can you supply me with some verilog codeto do this or examples
Thanks
Dave
I have a spi core(set as master) installed which has a C interface which controls a Mcp2515(spi) as a slave.
Trying to reduce overheads on the system C code, we require an additional Verilog module that will detect
when the Mcp2515 interupt pin goes low, and through the same SPI core which cause an additional spi
read interupt register(CANINTF) command to be carried out of the mcp2515.
To confirm the IRQ came from the receive buffer.
Then request RXB0 from the Can buffer.
Send spi instruction to the MCP2515 can chip to send its buffer contents.
Signal a IRQ to the Main C SOFTWARE, reset the Can chips IRQ line, ready for further messages.
Given the information above for the additional Verilog module,
IAM NOT SURE HOW TO CODE IN VERILOG THE ADDITIONAL INTERFACE BETWEEN THE SPI CORE AND THE MCP2515 CAN CHIP
Can you supply me with some verilog codeto do this or examples
Thanks
Dave
