Single Stage Differential Amplifier circuit Design

[Rohbinhoodie]

Hello guys.
I would like to get more than 15dB in this circuit.
I set M3, M4, M5 as the same width and control M1, M2 width and Iss bias current.
I set the length all the same as 0.18um.
Am I doing in the right way? or can you tell me how to start with?

I use Hspice program
Mosfet model is TSMC 180nm

+Vdd = 2.5v
+0.18um < Length < 5um
+0.18um < width < 100um
+Vcm = 1.25v

 

[arthorios]

This is a fully differential amplifier, so it needs some form of common-mode feedback (CMFB) to control its output common-mode voltage (I don't know if you are actually using one). If you search for "vishal saxena cmfb" you will find plenty of material to help you with this.

As for your sizing, it really depends on what are your specs. But from the small gain you are getting, it seems some transistors are out of saturation (probably because there is no CMFB?).

 

[jjx]

Perhaps stating the obvious: Do you set ISS = 2*Iref ?

As mentioned above, you need some kind of way to control the common-mode at the output before guaranteeing gain. One quick fix could be to test it in single-ended mode and size it for gain that way first. If it works in single-ended mode, it very likely works in differential too. Break the connection between M4 and M5 and tie the M3/M4 gates to one of the outputs of the amplifier.

 

[Rohbinhoodie]

Perhaps stating the obvious: Do you set ISS = 2*Iref ?

As mentioned above, you need some kind of way to control the common-mode at the output before guaranteeing gain. One quick fix could be to test it in single-ended mode and size it for gain that way first. If it works in single-ended mode, it very likely works in differential too. Break the connection between M4 and M5 and tie the M3/M4 gates to one of the outputs of the amplifier.

Thank you for answering.
I have a question. Do I have to set Iss 0.2mA?? if I do, what's the reason?

 

[arthorios]

Thank you for answering.
I have a question. Do I have to set Iss 0.2mA?? if I do, what's the reason?

Yes, you need to make ISS/2 = ID3,4 (where ID3,4 = Iref), as jjx already mentioned.
The reason for it goes back to the need for a CMFB. To summarize, you are trying to balance two current: M3,4 (PMOS) and ISS/2 (NMOS). Any mismatch between these two will make the output common-mode voltage go up or down. This means that either M3,4 or the NMOS transistor that implements ISS will go into the triode region to balance the currents. So, that's why you need a CMFB, which controls the output CM voltage to a known level for your circuit to operate correctly.

You will probably not get the whole idea of why you need and how you implement a CMFB for your circuit from this. So I advise you to go through a textbook (probably Razavi's) to get a clear view of this.

I hope this helps.

 

[d123]

Hi,

At the risk of making a fool of myself, nothing new there..., isn't it just that Iss = Iout M4 + Iout M3 ( = tail current is always the sum of both sides of an amplifiers input legs current sources)? Or so the tutorials about OA design tell me. Anything more complicated is for the experts here.

 

[24BSNR]

Hi,

At the risk of making a fool of myself, nothing new there..., isn't it just that Iss = Iout M4 + Iout M3 ( = tail current is always the sum of both sides of an amplifiers input legs current sources)? Or so the tutorials about OA design tell me. Anything more complicated is for the experts here.

Although this is often the case (as in a simple diff pair here) , it's not always true in general otas. A simple example is a folded cascode architecture where M3,4 sources must provide more than Iss. A better general rule is simple that sum of the currents entering/leaving Iss drain should equal total Iss drain current (by KCL).