sinewave inverter under load

[tsan500]

You wrote that you have 60 sine wave ref tables. Have you tested with fixed table so that the same table is used with no load and with load? Perhaps this is caused by feedback that changes the table all the time...eventually causing a square wave.

Is your unipolar PWM like described in

https://www.ijirst.org/articles/IJIRSTV1I7111.pdf

,so that you have two sine wave references that are compared to the carrier? There seems to be more than one definition for bipolar and unipolar. Both bipolar and unipolar should be free of no load square wave problem, though.

 

[freeman3020]

attached digital analysis for mosfet H-bridge gate signal it's start from up to down ::: left low side , left high side -- right low side ,right high side respectively

 

[tsan500]

I'm not familiar with the modulation method you use. It reduced switching losses a lot so I assume it has some drawback too. Otherwise I don't understand how I have not seen it in the context of pure sine inverters. What I have wrote earlier is meant for bipolar modulation shown on the pdf I linked. Also the LTspice simulation I attached earlier is for the same bipolar modulation type too.

 

[freeman3020]

I found same problem here < see ahsan_i_h reply

he suggest to Reverse High and Low signal to solve no load problem

https://www.edaboard.com/showthread.php?t=290299&page=2&p=1248716&viewfull=1#post1248716

Is this correct , because I don't want to do a lot of modification without result