Follow along with the video below to see how to install our site as a web app on your home screen.
Note: This feature may not be available in some browsers.
Absolutely not!Yeah, but I have task to implement Class AB push pull output stage and hence my Voltage swing will be limited roughly by VDD-0.3 to VSS+0.3.
Still, these are not discrete devices. CMOS bias currents regurarly not bigger than 100uA for a standard OPAmp. With low length (~200nm) and not too big width (~10-100um) a device can conduct easily this 100uA under the threshold voltage, but close to the threshold. If the W/L for the device is such large as above a very small gate-overdrive voltage is needed to reach even much higher currents. In sub-threshold conduction the Ids(Vgs) function is exponential, over Vth it is a square-law function, thus Ids arises rapidly close to the Vth, especially under it.the threshold voltage is when the current in a Mosfet is so low that it is almost turned off.
I believe for you, I haven't seen too much. I can imagine that standard discrete OPAmps have to operate with at least 10V supply, otherwise manufacturers couldn't sell enough. With higher supply the devices have to tolerate higher voltages, Vth variation is higher and they cannot ensure the desired output voltage range with common-drain output then. But this is not that case, bharath_k is designing for 22nm technology and 1.8V supply. He started other posts in this topic, unfortunately he didn't share these infos here.All the Cmos amplifier ICs that I have seen are rail-to-rail then their output Mosfets are common source, not common drain as in the schematic posted.