signal noise issue(RS232)

[billchen]

Test issue description:
Input -3V~3V square waveform. The output signal should be inverted 0~3V signal.
But i see big noise added on the output signal.
The noise frequency is about 70KHz, and it is independent with input signal frequency.
So what is the main reason?
Thanks in advance.

 

[keith1200rs]

Something in your circuit is generating it. Microcontroller maybe?

Keith

 

[billchen]

No microcontroller internal.
I put a 10uF cap between vcc and gnd, no effect with output noise.
If i put this cap between output and gnd, the noise vpp increase obviously.

Only Smith trigger, inverter and buffer between input and output.

Added after 28 minutes:

Good news. I have found the reasone.
Just like keith said, there is a internal clock which effect the output signal.

 

[keith1200rs]

It is probably the sampling clock in your RS232 chip.

Keith.

 

[billchen]

Not sampling clock. The clock is the internal signal of a charge pump on chip.
Keith ,thanks for your reply.

 

[keith1200rs]

What is the chip? You may have layout issues or it may simply be the grounding of your oscilloscope probe. Does it affect the operation?

Keith.

 

[billchen]

Yes, it should be the layout issue.
The vcc of clock and the output signal power supply are not separated in layout.