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shifting in verilog..plz help!!!!

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cutesue

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i have to send a 32bit input (IP address in hex for eg 703020F8 ). I need to take 4bits at a time and perform some operation on it,then next 4bits and so on.. how do i do it in verilog?
in gate level, I take 32bits,put it through a 32bit register, take an output of 8 lines (4bits each) and then put it through an 8:1 mux to get 4bit output..

can someone plz tell how to do it in verilog
 

i think you did not need mux and 8 output line of 4bit each .

First of all store your incoming data into internal 32bit register then using a mod 8 counter connect internal 4bit line to 4bit of internal register using part select operand so that at a time 4 bit of internal register will be connected to the internal line and then perform operation which you have to do on the 4 bit of data after the operation directly connect that to your output line .
 

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