[SOLVED] Seeking Your Help With Diff Pair Analysis

[sk.shawn]

Hi,

Inserted is a basic diff pair circuit and I am trying to analyze its common-mode behaviour. But before that, I realized that my thoughts have already been trapped without knowing how the source coupled voltages (Vs) of M1 & M2 vary at all. This is really painful as

1) Without analytically knowing how Vs varies, I cannot be entirely certain if M1 & M2 are on despite driving their gates with a reasonably high common-gate voltage (Vin,com) alone as in real fact the common gate-source voltages (Vgs) of M1 & M2 are not completely known due to the unknown state of Vs.

2) Without knowing the gate-source voltages (Vgs) of M1 & M2 now, how will the branch currents of M1 & M2 vary with an increase in the common-gate voltage (Vin,com) since the branch currents are a function of their respective gate-source voltages (Vgs) and not Vin,com alone?

3. Without knowing Vs analytically, how can I be certain about the operating region of M3 since Vs is also the drain-source voltage of M3?

So, it seems to me that the root cause of my self-trapping thoughts is not exactly knowing the state of Vs analytically which is somehow driving me nuts and I hope you will be able to shed some lighton this as I've tried searching online for answers but couldn't find anything to straighten out my thinking. Really look forward to hear from you soon. Really appreciate it and thanks.

Regards,
Shawn

 

[KerimF]

First assume M3 (drain-source) as a resistance (which can be controlled by Vb)... Does this solve the starting step?

 

[sk.shawn]

First assume M3 (drain-source) as a resistance (which can be controlled by Vb)... Does this solve the staring step?

Hey KerimF,

Thanks for replying. The assumption of treating M3 as a resistor first is valid and I did had that in mind. However, to model M3 as a resistor, it will mean that M3 is already operating in the linear region and for that to take place, Vs must be less than the overdrive of M3. But, how do I go about convincing myself that is indeed the case when I do not have any knowledge of how Vs may vary. I mean, is there a way to analytically deduce this or I should just develop my understanding in a different way?

Appreciate your reply once again.

Regards,
Shawn

 

[KerimF]

You are right...
On the other hand, do you have an idea why this circuit is symetrical in both respects; structure and driving signals?!
Is it to study the common mode rejection based on possible mismatch between the two transistors?

Kerim

 

[FvM]

In my opinion, assuming M3 as a current source should be more close to reality. For an exact analysis, the Vds dependancy of Id.Q3 must be considered. I won't expect the existence of an analytical solution for the nonlinear equations describing the cicrcuit behaviour, however.

 

[KerimF]

In my opinion, assuming M3 as a current source should be more close to reality.

In fact, this is what one expects for M3 to be. Perhaps this configuration is meant to be a multiplier, it resembles to the one using 3 npn transistors instead.

 

[sk.shawn]

You guys are right. For proper operation, M3 (including M1 & M2) must all be in saturation. M3 simply acts as a current source in that sense.

I came across this circuit in Razavi's book discussing the basics of analyzing this diff pair qualitatively. And, the author mentioned varying the common gate voltage (Vin,com) from 0 while observing the different regions of operation for M1-M3 as an attempt to determine the range of allowable values Vin,com can take on. But, it seems like right from the start I can't even establish what Vs could be so how is it even possible to figure out how the branch currents change without clearly having the knowledge of the gate-source voltages of M1 and M2 in not knowing the state of Vs. Sorry, I'm probably over-engineering things here but somehow I just can't convince myself about this. Any help is greatly welcomed.

Regards,
Shawn

 

[KerimF]

A circuit just follows the trial and error or the iteration process till it reaches the balanced (or steady) state.
In other words, I think for such a circuit there must be a number of independent equations with the same number of unknowns (variables).
What I am sure of is that, if I will build a similar circuit, it solves its equations (likely non-linear) much faster than I do :shock:

But... I may be able to beat it using a simulator and before connecting its power supply :twisted:

 

[FvM]

I came across this circuit in Razavi's book discussing the basics of analyzing this diff pair qualitatively. And, the author mentioned varying the common gate voltage (Vin,com) from 0 while observing the different regions of operation for M1-M3 as an attempt to determine the range of allowable values Vin,com can take on. But, it seems like right from the start I can't even establish what Vs could be so how is it even possible to figure out how the branch currents change without clearly having the knowledge of the gate-source voltages of M1 and M2 in not knowing the state of Vs. Sorry, I'm probably over-engineering things here but somehow I just can't convince myself about this. Any help is greatly welcomed.

I reviewed the respective chapter 4.2.1 and think everything is explained well. The chapter's objective is however clearly a qualitative analysis. It doesn't attempt to calculate Id versus Vin,cm exactly. Referring to chapter 2.2.2 you're nevertheless able to calculate the common mode behaviour quantitatively, using the simplified quadratic MOSFET characteristic assumed throughout Razavis book. It turns out, that an analytical solution for Id in the triode region of M3 exists. Just put in Eq. 2.8 and 2.13.

 

[checkmate]

Don't over complicate things.
The best answer is that the tail voltage is simply the input voltage minus Vgs of the input pair.
Then you think about what the Vgs of the input pair is. Simply look at your MOSFET square law equations, and you will find that all your answers are there!

 

[sk.shawn]

Hi all,

Thanks for the providing the explainations. I will think about it again. Appreciated