Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Resonant Capacitor in Phase shifted full bridge

Status
Not open for further replies.

shauns87

Junior Member level 1
Junior Member level 1
Joined
Feb 21, 2016
Messages
15
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,411
Hi,

Under which design conditions, we need to add the series resonant capacitor in phase shifted full bridge converters? "Cb" marked in yellow in the image below:
1688207123829.png
t

There are many reference designs which doesn't have additional resonant capacitor but only resonant inductor if the leakage inductance is not enough in the main transformer. However, I am unsure if we really to add the resonant capacitor as well. As per one of the application notes from Vishay - "It isnecessary to add Cb to avoid an unbalance of thetransformer flux and saturation of the transformer". However, it is not clear to me. Also, I am unsure how I can calculate the value of Cb if I have to use it in the design.

By any chance, can I get some help behind the theory or if there is any resource available to read to get more insight on this topic.

Thanks.
 

i once met it at a company, at an interview......its called a "resonant reset" capacitor, so i guess its going to need to resonate with the leakage inductance, ...possibly its value makes the resonant period larger/smaller/same as the switching period. Look up "PSFB -resonant reset" on google, say.

Ill send a sim of plane PSFB, then you can put in the cap and see what value is best.

Presumably its only done when in voltage mode(?)
 

The series capacitor is useful when voltage mode control is used, as it will prevent small imbalances in the pulses to lead to staircase saturation.

Peak current mode control, on the other hand, inherently provides resistance to staircase saturation, so the series cap is generally not necessary. If a series cap is used with peak CMC, then imbalance in the pulses will lead to charge imbalance in the capacitor, which is can create further problems.
 
Cb = blocking cap, blocks DC as set out above, which would otherwise saturate the transformer, small errors in gate drive timing can cause this imbalance

peak current mode uses a CT to switch at current peaks - limiting this effect.
 

Incidentally, is their any such thing as "PSFB -resonant reset"?.....(this could be interesting for OP) i was told of it at a military electronics company interview...it was literally a PSFB with a cap in series with the primary.......though you are saying this is simply for flux balancing?

They seemed a little pleased that i had never before heard of the "PSFB -resonant reset"......(thats what they called it)

As you know, Such a cap would certainly not be wanted to resonant with anything.

I also cant imagine why anyone would want to do a PSFB in voltage mode?.....it would simply go into peak currrent mode when overloaded anyway.
 
Last edited:

resonant reset refers to caps across the fets and how fast the voltage rises at turn off - when the Tx has DC in it - the volts fly up faster at turn off on one side and provide a few more V.uS in the reverse direction to help centre the BH loop - this has been done for ages on all types of converters - notably push pull.

In the other direction where the current is lesser ( DC subtracts ) the volts come up more slowly at turn off.
 
Thanks for that, and it shows how this forum is the best place for this knowledge...because not one of the PSFB App Notes by Infineon or Texas etc, actually point that out.

The modus operandi that you point out though, would surely occur even if there were no caps across the FETs, and the FETs' Cds cap was simply relied upon for this.........?

In which case, all PSFBs would be "resonant reset PSFB's"?
 

Cb = blocking cap, blocks DC as set out above, which would otherwise saturate the transformer, small errors in gate drive timing can cause this imbalance
This is interesting aswell...and also for OP.....i have reverse engineered a number of offline half bridges which have a fixed duty cycle....(500W to 3kW) pretty near 94% (ie 47% for each diagonal) . These dont have caps in series with the primary, and yet they dont go unbalanced. They dont have output inductors.....just use a high -ish leakage term. They obviously have an overcurrent limit.
It makes you wonder why these dont go unbalanced?, because the chip that gives the "fixed duty" cannot be giving precisely the same duty in each direction.
Often they had impressive high volume >10 year very low failure rates.
 

resonant reset refers to caps across the fets and how fast the voltage rises at turn off
Thanks, however, if there is a cap in series with the primary of the PSFB, then that is all that is needed to ensure no flux-walking in the main transformer. I presume We agree that the caps across the FETs and the cap in series with the primary, have different roles to play?
 

" These dont have caps in series with the primary, and yet they dont go unbalanced. They dont have output inductors.....just use a high -ish leakage term. They obviously have an overcurrent limit.
It makes you wonder why these dont go unbalanced?, because the chip that gives the "fixed duty" cannot be giving precisely the same duty in each direction. "


Sigh - you appear to be missing the ( physics of the ) point - if the fixed pwm is less than 48% say - then the reset mechanism can balance the core provided any system offsets are not too large. ( often max pwm set to 45% )

Often for these cheap and nasty DC/DC converters - the lack of output choke means that surge currents in the fets and diodes are considerable at start up ( even with soft start pwm ) - this is what often leads to failure for these things - poof at switch on.

The big issue is transient loads - besides causing large transient currents in the converter ( no choke ) they can also cause flux stair casing and then bang - which is why you sometimes see the series DC blocking cap - to prevent same,

especially on converters with toroidal cores - as these staircase really well with small provocation ( no gap - higher mu )

A series "DC" blocking cap can also limit the current if it is small enough - but care must be taken not to get near any series resonance at some load point as this would remove any series Z - the opposite of what is then being sought to achieve.

Your statement that they " obviously " have over current protection, is a misnomer - unless you count a fuse as such - or they rely on the finite Z of the source and Tx resistance for same ( often they do )

however a peak current limit to lower the pwm would be of some help - no doubt it would often trip ( be engaged ) during the above described scenarios . . . .
 
Thanks i have the full schem of this 800w one which is with constant fixed pwm half bridge and no output L, just Llk.....it had a superb track record in its use in oil platform....i will check and get back if i may because i am sure it had a current limit for the fets. (BTW i have posted here before about it..and others of same kind)....one was 3kW electro-plating power supply.
It did not have series cap in series with pri.

Sigh - you appear to be missing the ( physics of the ) point - if the fixed pwm is less than 48% say - then the reset mechanism can balance the core provided any system offsets are not too large. ( often max pwm set to 45% )
..thanks i dont have time right now, but will return, i am not sure which "reset mech" you refer to.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top