Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

relationship between INL/DNL and no. of bits in ADC

Status
Not open for further replies.

neoflash

Advanced Member level 1
Advanced Member level 1
Joined
Jul 2, 2005
Messages
492
Helped
10
Reputation
20
Reaction score
2
Trophy points
1,298
Activity points
4,759
relationship between INL/DNL and no. of bits

in some literatures, authors will state that "we improved INL to 9.5b". What is the relationship between these three specifications of ADC?
 

Hi neoflash,
INL basically means the non linearity of the ADC. Now when a authour states 9.5b INL this means the max INL error in the ADC is less than 1 lsb at 9.5bits!! Or in other words the transfer function of the ADC deviates from the ideal one by 1lsb at 9.5bits.
Say for eg you have an ADC with +/- 8lsb INL at say 14bits this implies that the INL is accurate upto 11bits. In your case if the ADC has +/-1.5lsb INL at 10bits then its INL is 9.5 bit accurate

hope this helps

rgds
fred
 

    neoflash

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top