farzaneh_2561
Member level 1
Hi everybody,
I am trying to drive a W5300 chip using FPGA. I was able to write into its registers successfully, but I have problem reading from the registers. Here is the timing description for read operation.
1. I drive cs and rd low. at the same time I put the register address on address bus. rd and cs stay low for 50ns.
2. I read the data bus.
3. cs and rd stay low for another 50ns. address is not changed until cs and rd are high.
but the bus always remains zero. not a change. I monitored the data bus using oscilloscope, but all data lines were zero all the time. Also, I tried reading from different registers.
Am I missing something here?
I really appreciate your help!
I am trying to drive a W5300 chip using FPGA. I was able to write into its registers successfully, but I have problem reading from the registers. Here is the timing description for read operation.
1. I drive cs and rd low. at the same time I put the register address on address bus. rd and cs stay low for 50ns.
2. I read the data bus.
3. cs and rd stay low for another 50ns. address is not changed until cs and rd are high.
but the bus always remains zero. not a change. I monitored the data bus using oscilloscope, but all data lines were zero all the time. Also, I tried reading from different registers.
Am I missing something here?
I really appreciate your help!